Synopsys Analog Design Contest 2014: Susmita Majumder and Debanjali Nath Come Up Trumps

By | November 27, 2014

The Synopsys Worldwide University Program provides industry-leading EDA tools and resources for teaching and academic research to numerous universities around the globe. Using Synopsys products in a learning environment provides students with hands-on experience and enables graduates to begin accelerating innovation right away in the fast paced world of semiconductor technology. Benefits of membership in the program include access to technical support, training, curriculum and more.


In this regard Synopsys had arranged Synopsys Analog Design Contest 2014 and Susmita Majumder and Debanjali  Nath of the National Institute of Technology (NIT) Agartala won the first place. To participate in the contest, students had to design a complete schematic, run simulations, and create a DRC/LVS clean layout of a low-dropout (LDO) voltage regulator using an interoperable process design kit (iPDK) and Synopsys’ analog/mixed-signal tools, including the Galaxy Custom Designer® solution, HSPICE™ circuit simular, Custom WaveView™ tool, IC Validator, and StarRC™ extraction product. Contest committee members from Synopsys India, CDAC Noida and the University of Hyderabad selected the winners based on their design’s functionality, efficiency and area, and on the teams’ productivity.

The Analog Design Contest: Synopsys India launched the Analog Design Contest in April 2014, with more than 90 students from more than 50 universities participating. Over the course of three months, each team was required to complete a schematic and DRC/LVS clean layout of an LDO voltage regulator. The design had to meet prescribed specifications and be an original work. Students were provided with access to Synopsys analog/mixed-signal tools, an iPDK and training on LDO design and the use of the tools. Contest committee members from CDAC Noida, the University of Hyderabad and Synopsys judged the designs based on criteria that include: functionality demonstrated through HSPICE simulations; measure of efficiency, drop-out voltage, quiescent current, load regulation, line regulation and Power Supply Rejection Ratio (PSRR); optimal area of layout that is DRC/LVS clean; and effective use of design productivity features available with the tool flow.

Synopsys Inc. accelerates innovation in the global electronics market. As a leader in electronic design automation (EDA) and semiconductor IP, Synopsys delivers software, IP and services to help engineers address their design, verification, system and manufacturing challenges. Since 1986, engineers around the world have been using Synopsys technology to design and create billions of chips and systems.


Author: Saugaat

Generally, the path of least resistance appeals. Good Samaritan, armchair football fan, especially gifted napper.